Semiconductor chips, including by way of exemplification only memory chips, are typically produced en masse by creating an array of chips on a single, relatively large, wafer made of suitable semiconductor material. The chips are created through techniques involving masking and etching as are known in the art. After the chips are created through these processes, or during such creation, leads are added to the chip such that the chip and its components can be electrically connected to other devices. After the chips have been created on the larger wafer, the wafer is cut to produce the individual chips.
Currently, the leads used for chips, and especially for high-speed chips, are balls connected in an array to one side, referred to as the bottom, of the chip. The balls consist of a eutectic metal compound similar to a soldering compound. Devices such as these are commonly referred to as ball grid array (BGA) devices. Such ball grid array devices can be placed on a substrate such as a larger circuit board, with the ball grid array of the chip aligned with the appropriate connectors of the substrate. Application of heat melts the balls sufficiently to form a secure electrical contact between the electrical elements on the chip and the electrical connections on the substrate.
In the industry, it has been determined that it is less expensive to test each chip after the chips are cut from the larger wafer. This way, a defective chip is detected before it is integrated into a larger circuit, or is shipped to a buyer for the buyer's uses. This is especially true because chips are usually sold in large quantities. If a defective chip or circuit is found, the buyer typically returns an entire shipment rather than conducting its own testing to determine which chips are satisfactory and which are not. Therefore, quality control procedures to test each individual chip prior to shipping or further integration are very important.
A typical testing apparatus for testing chips consists of a test circuit board or substrate having at least one set of electrical connections arrayed in a test circuit pattern that matches the ball grid array pattern of the chip. For testing purposes, a substrate may have tens or hundreds of such test circuit arrays to permit the testing of an equal number of chips. A casement or fixture is mounted to the substrate. The casement is typically a plastic device having an opening there through, and is typically provided with a cover. The cover is connected to the casing via a hinge. The opening of the casing is sized such that a properly cut chip will fit exactly within the opening, and is often sized such that some force is required to securely seat the chip within the opening. The opening is also created such that a chip seated within the opening will be aligned such that the ball grid array of the chip is appropriately aligned with the connectors in the substrate. The chip is seated within the casing and the cover is closed, thereby forcing the chip downward toward the substrate such that a secure electrical connection is created between the ball grid array and the substrate. The substrate can then be used to test the components and/or operation of the chip.
A major problem with the foregoing method of testing chips is caused by misalignment of the ball grid array with the connectors in the substrate. Due to the very small size of the typical chip, very minor errors in positioning the chip with respect to the substrate can cause a misalignment of the ball grid array with the substrate connectors. A large number of chips rejected due to failure of the testing process fail not because the chip itself is faulty, but because the alignment, and hence the testing, was in error.
The misalignment is most often caused by the cutting process. As chips are cut from the wafer, the saws used to cut the chips are subject to relatively high cutting temperatures. The saws also wear during the process because of the hardness of the semiconductor material. A significant number of chips in each wafer therefore have length and/or width dimensions that differ, albeit slightly, from what is desired. Upon testing, these chips may not fit correctly within the opening in the casings. If the dimensional error is great enough that the chip cannot be forced into the opening, the chip will be rejected even if it is electrically satisfactory. If the chip can be forced into the opening, the slight dimensional variation may prevent the ball grid array from aligning properly with the electrical connections on the substrate. Such a chip will fail the electrical test and be rejected, even if the only fault is a slight dimensional variation having no effect on the proper operation of the chip.
Attempts have been made to improve various aspects of the problem of accurately aligning a ball grid array with the substrate or circuit to which a BGA device is connected for testing or for assembly of a larger device. These attempts typically involve complicated and expensive devices. U.S. Pat. No. 6,380,492 to Yoshioka, for example, discloses a contact film for making electrical contact with the balls of a BGA device. This patent discloses a multi-layer plastic laminate, the individual layers of the laminate having holes therein and the layers being assembled so as to form a grid pattern of holes. Each layer in the laminate has electrical leads terminating at selected holes. When the layers are laminated together, the holes in each layer coincide with those in other layers. A BGA device is forced down onto the laminate, and the device can be tested by activating the various electrical leads on each layer. The laminate can be constructed to allow the simultaneous testing of a plurality of BGA devices. As disclosed in this patent, however, the laminate requires creating the various leads on each layer and laminating the layers together to achieve the appropriate patterns. For each different type of BGA device to be tested, an entirely new set of layers must be manufactured and carefully assembled.
In U.S. Pat. No. 6,416,332 to Carron et al. there is disclosed another type of socket for connecting a BGA device to a larger circuit board or other device for testing or manufacture. This patent discloses using an array of resilient conductive pads arranged to complement the array of the BGA device. The pads enable the electrical connection between the BGA device and the electrical connections in the underlying substrate or circuit. This apparatus requires the manufacture of pads that have been specifically manufactured for each different type of BGA device, and require the pad to have discrete conductive contacts for each ball of the BGA device. This requires that the pads be precisely manufactured to ensure that the conductive contacts are operative. The pads require precise, multistep manufacturing to provide the resilient conductive leads disclosed in this patent.
In U.S. Pat. No. 6,394,820 to Palaniappa et al. there is disclosed an assembly and mounting apparatus useful for BGA devices. This apparatus, however, utilizes an array of pins, and is directed to the problem of ensuring a secure electrical contact between the BGA device being tested and the substrate or circuit board. Again, the device is relatively complicated, having numerous very small parts that are subject to misalignment. Furthermore, such devices as pins can very easily be damaged, and damage to a very few pins in the array can destroy the usefulness of the entire device.
There is a need in the industry to provide a means of effectively testing BGA devices with relatively inexpensive apparatus that eliminates the need for replacing expensive testing equipment while simultaneously reducing the rate of rejection of BGA devices for physical variations not affecting the functionality of the devices.